EPM5192ALC84-15 vs EPM5192AJC84-20 Comparison
Detailed side-by-side comparison of EPM5192ALC84-15 by Altera and EPM5192AJC84-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM5192AJC84-20 - 192-Macrocell UV PLD, 33ns, 84-Pin J-Lead | Altera
EPM5192AJC84-20 ObsoleteSpecification Comparison
| Parameter | EPM5192ALC84-15 | EPM5192AJC84-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $13.20 | $19.20 |
| Device Family | MAX 5000 (EPM5192) | β |
| Device Type | CPLD / UV-Erasable / OTP Complex PLD | UV-erasable/OTP Complex PLD (CPLD) |
| Macrocells | 192 | 192 |
| Dedicated Inputs | 7 | 7 |
| User I/O Pins | 64 | β |
| Propagation Delay (tPD) | 15 ns | β |
| Propagation Delay (Industry Variant) | 25 ns (per MicrochipUSA listing) | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (nominal 5 V) | β |
| Process Technology | CMOS (EPROM-based) | CMOS, UV-erasable EEPROM |
| Programmability | UV-erasable window / OTP | β |
| Package | 84-pin PLCC (QCCJ, J-bend ceramic) | 84-pin PLCC J-Lead (WQCCJ, J84) |
| Operating Temperature Grade | Commercial | Commercial |
| Terminal Form | J-BEND | β |
| Package Code | QCCJ | β |
| Package Shape | SQUARE | β |
| Architecture | Programmable Logic Array + Macrocell Registers + PIA interconnect | β |
| Family | β | MAX 5000 |
| Propagation Delay (tpd) | β | 33 ns (speed grade -20) |
| Maximum Clock Frequency | β | 66.7 MHz |
| Supply Voltage (Vcc) | β | 4.75 V to 5.25 V |
| User I/O Lines | β | 64 |
| Mounting Type | β | Surface Mount (J-Lead) |
| MSL Level | β | [DATA_NEEDED: MSL level] |
| RoHS Status | β | [DATA_NEEDED: RoHS status] |
| Programming Tool | β | Altera MAX+PLUS II / Quartus (legacy) |
| Lead-Free / Halogen-Free | β | [DATA_NEEDED: lead-free status] |