EPM5192ALI84-15 vs EPM5192LI84 Comparison

Detailed side-by-side comparison of EPM5192ALI84-15 by Altera and EPM5192LI84 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192ALI84-15 EPM5192LI84
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Device Family MAX 5000 MAX 5000
Product Type UV-Erasable / OTP Complex PLD UV-Erasable/OTP Complex PLD (CPLD)
Logic Macrocells 192 —
Dedicated Inputs 7 —
Bidirectional I/O Pins 64 —
Maximum Total Inputs 72 —
Propagation Delay (tPD) 25 ns (-15 speed grade) —
Process Technology CMOS, non-volatile EPROM/OTP —
Programmability One-Time Programmable (windowless) —
Package 84-pin PQCC (PLCC, J-Lead) —
JEDEC JESD-30 Code S-PQCC-J84 —
Terminal Form J Bend (J-Lead) —
Operating Temperature Grade Industrial —
Operating Temperature Range [DATA_NEEDED: temperature range] -40 °C to +85 °C (industrial)
Supply Voltage [DATA_NEEDED: VCC range] —
Mounting Type Surface Mount (PLCC socket compatible) Surface Mount (socket-compatible)
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Usable Gates — 3,750 gates
Macro Cells — 192
Maximum Toggle Frequency — 40 MHz
Pin-to-Pin Delay (tPD) — 25 ns
Supply Voltage (VCC) — 5 V (single supply)
User I/O Pins — 64 (max)
Package Type — 84-pin PLCC (J-lead, package code J84/QCCJ)
Configuration Memory — OTP / UV-erasable EPROM
Programming Method — Stand-alone programmer (no JTAG on LI84 OTP variant)
Logic Compatibility — TTL-compatible I/O

Datasheets & Resources

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