EPM5192C-2 vs EPM5192GC-2 Comparison
Detailed side-by-side comparison of EPM5192C-2 by Altera and EPM5192GC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192C-2 | EPM5192GC-2 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $13.20 | $92.00 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | Complex Programmable Logic Device (CPLD) | β |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | β |
| Logic Array Blocks (LABs) | 12 | β |
| Dedicated Inputs | 7 | β |
| External Clock Inputs | 1 | β |
| Propagation Delay (PIA, typical) | 45 ns | β |
| Maximum Operating Frequency | 50 MHz | β |
| Process Technology | CMOS | β |
| Configuration Memory | EEPROM (non-volatile) | β |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | β |
| Speed Grade | -2 | -2 |
| Programming Interface | JTAG / Altera MAX+ programming | β |
| RoHS Status | unknown | Non-Compliant (ceramic PGA, lead-bearing per GlobalSpec listing) |
| Lead-Free | unknown | β |
| Logic Array Blocks | β | 16 (LABs of 16 macrocells each) |
| Usable I/O Pins | β | [DATA_NEEDED: exact user I/O count for PGA package] |
| Propagation Delay (tPD) | β | 12 ns typical (-2 grade) |
| Counter Frequency | β | 100 MHz minimum |
| Supply Voltage (VCC) | β | 5 V nominal |
| Technology | β | CMOS EPROM |
| Programmable Technology | β | UV-erasable / one-time programmable |
| Programming Toolchain | β | Altera MAX+PLUS II |
| Package Type | β | Pin Grid Array (PGA), ceramic |
| Operating Temperature | β | Commercial (0C to +70C) |
| Mounting Type | β | Through-hole (PGA socket) |