EPM5192GI84 vs EPM5192GM-1 Comparison

Detailed side-by-side comparison of EPM5192GI84 by Altera and EPM5192GM-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192GI84 EPM5192GM-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family MAX 5000 MAX 5000
Device Type UV-Erasable / OTP Complex PLD (CPLD) —
Macrocells 192 —
Logic Array Blocks [DATA_NEEDED: number of LABs] —
Package 84-pin PGA (WPGA, square, through-hole, pin/peg terminals) CPGA-84 (Windowed Ceramic PGA)
Package Code WPGA —
Operating Voltage (VCC) 5 V (typical) —
I/O Logic Compatibility TTL —
Temperature Grade Industrial —
Programmable Flip-Flop Modes D, T, JK, SR —
Programmability UV-erasable (windowed) / OTP —
Programming File Format JEDEC map via MAX+PLUS II / A+PLUS —
Propagation Delay [DATA_NEEDED: tPD in ns] —
Max User I/O Pins [DATA_NEEDED: usable I/O count for this package] —
Operating Temperature Range -40 C to +85 C (industrial) [DATA_NEEDED: commercial/industrial/military grade]
Mounting Type Through-Hole (PGA socket or PCB pin/peg) Through-Hole (Pin Grid Array socket)
RoHS Status [DATA_NEEDED: most legacy PGA parts are non-RoHS] —
Lead-Free [DATA_NEEDED: legacy part, likely contains lead] —
Number of Terminals 84 —
Terminal Form PIN/PEG —
Package Shape SQUARE —
Logic Cells — 192
Propagation Delay (tpd) — 55 ns
Process Technology — CMOS
Programmable Element — UV-erasable EPROM
Pin Count — 84
Supply Voltage — [DATA_NEEDED: VCC nominal]
Programmable Macrocells — 192
User I/O Pins — [DATA_NEEDED: user I/O count]
RoHS Compliance — unknown (legacy ceramic PGA)
Lead-Free Status — unknown
Programming Interface — Altera ByteBlaster / JEDEC bitstream
Development Tool — Altera MAX+PLUS II (legacy)

Datasheets & Resources

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