EPM5192GI84 vs EPM5192GM-1 比較
詳細並排比較 EPM5192GI84 由 Altera 與 EPM5192GM-1 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192GI84 | EPM5192GM-1 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-Erasable / OTP Complex PLD (CPLD) | — |
| Macrocells | 192 | — |
| Logic Array Blocks | [DATA_NEEDED: number of LABs] | — |
| 封裝 | 84-pin PGA (WPGA, square, through-hole, pin/peg terminals) | CPGA-84 (Windowed Ceramic PGA) |
| Package Code | WPGA | — |
| Operating Voltage (VCC) | 5 V (typical) | — |
| I/O Logic Compatibility | TTL | — |
| Temperature Grade | Industrial | — |
| Programmable Flip-Flop Modes | D, T, JK, SR | — |
| Programmability | UV-erasable (windowed) / OTP | — |
| Programming File Format | JEDEC map via MAX+PLUS II / A+PLUS | — |
| Propagation Delay | [DATA_NEEDED: tPD in ns] | — |
| Max User I/O Pins | [DATA_NEEDED: usable I/O count for this package] | — |
| 工作溫度範圍 | -40 C to +85 C (industrial) | [DATA_NEEDED: commercial/industrial/military grade] |
| 安裝類型 | Through-Hole (PGA socket or PCB pin/peg) | Through-Hole (Pin Grid Array socket) |
| RoHS 狀態 | [DATA_NEEDED: most legacy PGA parts are non-RoHS] | — |
| Lead-Free | [DATA_NEEDED: legacy part, likely contains lead] | — |
| Number of Terminals | 84 | — |
| Terminal Form | PIN/PEG | — |
| Package Shape | SQUARE | — |
| Logic Cells | — | 192 |
| Propagation Delay (tpd) | — | 55 ns |
| Process Technology | — | CMOS |
| Programmable Element | — | UV-erasable EPROM |
| 腳位數 | — | 84 |
| 供應電壓 | — | [DATA_NEEDED: VCC nominal] |
| Programmable Macrocells | — | 192 |
| User I/O Pins | — | [DATA_NEEDED: user I/O count] |
| RoHS Compliance | — | unknown (legacy ceramic PGA) |
| Lead-Free Status | — | unknown |
| Programming Interface | — | Altera ByteBlaster / JEDEC bitstream |
| Development Tool | — | Altera MAX+PLUS II (legacy) |