EPM5192JC84-1 vs EPM5192LC1 Comparison

Detailed side-by-side comparison of EPM5192JC84-1 by Altera and EPM5192LC1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192JC84-1 EPM5192LC1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Device Type UV-Erasable/OTP Complex Programmable Logic Device (CPLD) Complex PLD (CPLD), UV-erasable/OTP
Family MAX 5000 MAX 5000
Macrocells 192 192
Propagation Delay (tpd) 40 ns (worst case) —
Supply Voltage (Vcc) 4.75 V to 5.25 V (5 V ±5 %) —
Process Technology CMOS EPROM CMOS EPROM
Operating Temperature Grade Commercial —
Package 84-terminal Ceramic Chip Carrier (CQCC84 / J-lead) PQCC-84 (JEDEC S-PQCC-J84, 84-lead Plastic Leaded Chip Carrier)
JESD-30 Package Code S-CQCC-J84 —
Terminal Form J-BEND —
Package Shape SQUARE —
Mounting Type Surface Mount Surface Mount
Programmability UV-erasable (window) / OTP in production —
Configuration Memory EPROM (non-volatile, instant-on) —
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Equivalent Gates — 3750
Dedicated Inputs — 7
User I/O Pins — 64
Nominal Supply Voltage (VCC) — 5 V
Supply Voltage Range — 4.75 V to 5.25 V
Maximum Clock Frequency — 50 MHz
Propagation Delay (tPD) — 40 ns
Programming Method — OTP (LC plastic package); UV-erasable equivalents in JC ceramic package
Operating Temperature (Commercial 'LC') — 0 °C to 70 °C
JEDEC Package Code — S-PQCC-J84

Datasheets & Resources

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