EPM5192JC84-1 vs EPM5192LC1 对比

详细并排对比 EPM5192JC84-1 出自 Altera 和 EPM5192LC1 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192JC84-1 EPM5192LC1
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $15.20 $17.40
Device Type UV-Erasable/OTP Complex Programmable Logic Device (CPLD) Complex PLD (CPLD), UV-erasable/OTP
Family MAX 5000 MAX 5000
Macrocells 192 192
Propagation Delay (tpd) 40 ns (worst case) —
Supply Voltage (Vcc) 4.75 V to 5.25 V (5 V ±5 %) —
Process Technology CMOS EPROM CMOS EPROM
Operating Temperature Grade Commercial —
封装 84-terminal Ceramic Chip Carrier (CQCC84 / J-lead) PQCC-84 (JEDEC S-PQCC-J84, 84-lead Plastic Leaded Chip Carrier)
JESD-30 Package Code S-CQCC-J84 —
Terminal Form J-BEND —
Package Shape SQUARE —
安装类型 Surface Mount Surface Mount
Programmability UV-erasable (window) / OTP in production —
Configuration Memory EPROM (non-volatile, instant-on) —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Equivalent Gates — 3750
Dedicated Inputs — 7
User I/O Pins — 64
Nominal Supply Voltage (VCC) — 5 V
Supply Voltage Range — 4.75 V to 5.25 V
最大时钟频率 — 50 MHz
Propagation Delay (tPD) — 40 ns
Programming Method — OTP (LC plastic package); UV-erasable equivalents in JC ceramic package
Operating Temperature (Commercial 'LC') — 0 °C to 70 °C
JEDEC Package Code — S-PQCC-J84

数据手册与资源

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