EPM5192LC1 vs EPM5192JC84-1 Comparison
Detailed side-by-side comparison of EPM5192LC1 by Altera and EPM5192JC84-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192LC1 | EPM5192JC84-1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $17.40 | $15.20 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | Complex PLD (CPLD), UV-erasable/OTP | UV-Erasable/OTP Complex Programmable Logic Device (CPLD) |
| Macrocells | 192 | 192 |
| Equivalent Gates | 3750 | β |
| Dedicated Inputs | 7 | β |
| User I/O Pins | 64 | β |
| Package | PQCC-84 (JEDEC S-PQCC-J84, 84-lead Plastic Leaded Chip Carrier) | 84-terminal Ceramic Chip Carrier (CQCC84 / J-lead) |
| Nominal Supply Voltage (VCC) | 5 V | β |
| Supply Voltage Range | 4.75 V to 5.25 V | β |
| Maximum Clock Frequency | 50 MHz | β |
| Propagation Delay (tPD) | 40 ns | β |
| Process Technology | CMOS EPROM | CMOS EPROM |
| Programming Method | OTP (LC plastic package); UV-erasable equivalents in JC ceramic package | β |
| Operating Temperature (Commercial 'LC') | 0 Β°C to 70 Β°C | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| JEDEC Package Code | S-PQCC-J84 | β |
| Propagation Delay (tpd) | β | 40 ns (worst case) |
| Supply Voltage (Vcc) | β | 4.75 V to 5.25 V (5 V Β±5 %) |
| Operating Temperature Grade | β | Commercial |
| JESD-30 Package Code | β | S-CQCC-J84 |
| Terminal Form | β | J-BEND |
| Package Shape | β | SQUARE |
| Programmability | β | UV-erasable (window) / OTP in production |
| Configuration Memory | β | EPROM (non-volatile, instant-on) |