EPM5192LC1 vs EPM5192JC84-1 Comparación
Comparación detallada lado a lado de EPM5192LC1 por Altera y EPM5192JC84-1 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192LC1 | EPM5192JC84-1 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $17,40 | $15,20 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | Complex PLD (CPLD), UV-erasable/OTP | UV-Erasable/OTP Complex Programmable Logic Device (CPLD) |
| Macrocells | 192 | 192 |
| Equivalent Gates | 3750 | — |
| Dedicated Inputs | 7 | — |
| User I/O Pins | 64 | — |
| Encapsulado | PQCC-84 (JEDEC S-PQCC-J84, 84-lead Plastic Leaded Chip Carrier) | 84-terminal Ceramic Chip Carrier (CQCC84 / J-lead) |
| Nominal Supply Voltage (VCC) | 5 V | — |
| Supply Voltage Range | 4.75 V to 5.25 V | — |
| Frecuencia de reloj máxima | 50 MHz | — |
| Propagation Delay (tPD) | 40 ns | — |
| Process Technology | CMOS EPROM | CMOS EPROM |
| Programming Method | OTP (LC plastic package); UV-erasable equivalents in JC ceramic package | — |
| Operating Temperature (Commercial 'LC') | 0 °C to 70 °C | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| JEDEC Package Code | S-PQCC-J84 | — |
| Propagation Delay (tpd) | — | 40 ns (worst case) |
| Supply Voltage (Vcc) | — | 4.75 V to 5.25 V (5 V ±5 %) |
| Operating Temperature Grade | — | Commercial |
| JESD-30 Package Code | — | S-CQCC-J84 |
| Terminal Form | — | J-BEND |
| Package Shape | — | SQUARE |
| Programmability | — | UV-erasable (window) / OTP in production |
| Configuration Memory | — | EPROM (non-volatile, instant-on) |