EPM5192LC2 vs EPM5192LC-25 Comparison
Detailed side-by-side comparison of EPM5192LC2 by Intel and EPM5192LC-25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192LC2 | EPM5192LC-25 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $17.40 | $55.00 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | β |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | β |
| Logic Array Blocks (LABs) | 12 | β |
| Dedicated Inputs | 7 | β |
| External Clock Inputs | 1 | β |
| Propagation Delay (tpd) | 45 ns (LC-2 speed grade) | β |
| Maximum Clock Frequency | 50 MHz | β |
| Supply Voltage (VCC) | 5 V | β |
| Process Technology | CMOS | β |
| Package | PQCC-84 (84-pin Plastic J-Lead Chip Carrier) | JLCC-84 (ceramic J-lead chip carrier) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | β |
| Reprogrammability | Windowed UV-erasable (ceramic package variants) / One-time programmable (plastic) | β |
| Product Type | β | CPLD (Complex Programmable Logic Device) |
| Logic Elements | β | 192 (1 macrocell β 1 LE in MAX 5000 architecture) |
| Pin-to-Pin Delay (tPD) | β | 25 ns |
| Speed Grade | β | -25 (25 ns) |
| Programmable Technology | β | UV-erasable / OTP (EPROM-based) |
| Programming Interface | β | JTAG / Altera programming hardware (legacy) |
| Supply Voltage | β | 5 V (typical, MAX 5000) |
| I/O Standard | β | TTL-compatible |
| Configuration Memory | β | Non-volatile EPROM (on-chip) |
| Manufacturer | β | Altera Corporation (now Intel PSG) |
| RoHS Status | β | Unknown (legacy ceramic package typically non-RoHS) |