EPM5192LC2 vs EPM5192LC-2N Comparison

Detailed side-by-side comparison of EPM5192LC2 by Intel and EPM5192LC-2N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192LC2 EPM5192LC-2N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $17.40 $11.85
Family MAX 5000 MAX 5000
Device Type EPLD (Erasable Programmable Logic Device) β€”
Macrocells 192 192
User I/O Pins 64 β€”
Logic Array Blocks (LABs) 12 β€”
Dedicated Inputs 7 β€”
External Clock Inputs 1 β€”
Propagation Delay (tpd) 45 ns (LC-2 speed grade) β€”
Maximum Clock Frequency 50 MHz β€”
Supply Voltage (VCC) 5 V β€”
Process Technology CMOS β€”
Package PQCC-84 (84-pin Plastic J-Lead Chip Carrier) β€”
Mounting Type Surface Mount Surface Mount (LC package)
Operating Temperature [DATA_NEEDED: operating temperature range] Commercial (0C to +70C) - inferred from speed-grade -2 designation
Programmable Interconnect Programmable Interconnect Array (PIA) β€”
Reprogrammability Windowed UV-erasable (ceramic package variants) / One-time programmable (plastic) β€”
Flip-Flops β€” 192
Logic Elements β€” 192 macrocells (PAL/GAL-style AND-OR array)
Package Type β€” LC (ceramic J-leaded, windowed UV-erasable package family)
Speed Grade β€” -2 (tPD approximately 25 ns)
Propagation Delay (typical) β€” 25 ns
Supply Voltage β€” 5 V (typical)
Programmability β€” UV-erasable EPROM cell
RoHS Status β€” Compliant (per -N lead-free suffix)
Lead-Free β€” Yes (per -N suffix)
Architecture β€” Programmable Logic Array (PLA) with global PIA
Programming Interface β€” Altera programming hardware (MAX+PLUS II / ByteBlaster compatible)

Datasheets & Resources

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