EPM570GT100I5N vs EPM570GT100C5N Comparison
Detailed side-by-side comparison of EPM570GT100I5N by Altera and EPM570GT100C5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM570GT100I5N - 440-Macrocell CPLD, 5.4ns, MAX II, 100-TQFP | Altera
EPM570GT100I5N β ActiveSpecification Comparison
| Parameter | EPM570GT100I5N | EPM570GT100C5N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.50 | $11.05 |
| Family | MAX II | β |
| Logic Elements | 570 LE | 570 |
| Equivalent Macrocells | 440 macrocells | 440 |
| Number of LABs | 57 | β |
| User I/Os | 76 | β |
| Maximum Operating Frequency | 304 MHz | β |
| Propagation Delay (tPD1) | 5.4 ns | β |
| Operating Supply Voltage (Core) | 1.8 V | β |
| User Flash Memory | 8 Kbit | β |
| Package | 100-pin TQFP (GT100) | TQFP-100 |
| Mounting Type | Surface Mount (SMD/SMT) | Surface Mount |
| Operating Temperature | -40 Β°C to +100 Β°C (Industrial) | 0C to +85C (Commercial) |
| Process | 0.18 Β΅m, 6-layer-metal flash | β |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | IEEE 1149.1 boundary scan |
| MultiVolt I/O Support | 1.8 V / 2.5 V / 3.3 V | β |
| Internal Oscillator | Yes | β |
| Non-volatile Configuration | Yes (instant-on, no external boot PROM) | β |
| RoHS Status | Compliant | Compliant |
| Series | β | MAX II |
| User I/O | β | 76 |
| LABs | β | 36 |
| Maximum Frequency | β | 304 MHz |
| Pin-to-Pin Delay | β | [DATA_NEEDED: tPD value] |
| User Flash Memory (UFM) | β | 8 Kbit |
| Operating Supply Voltage (VCCINT) | β | 2.5 V / 3.3 V |
| I/O Standards Supported | β | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVTTL/LVCMOS |
| Programmability | β | Flash-based, non-volatile (ISP via JTAG) |