EPM570T144C3N vs EPM570T144C3 Comparison
Detailed side-by-side comparison of EPM570T144C3N by Altera and EPM570T144C3 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM570T144C3N
EPM570T144C3N - 570 LEs MAX II CPLD, TQFP-144 | Altera/Intel
EPM570T144C3N β ActiveSpecification Comparison
| Parameter | EPM570T144C3N | EPM570T144C3 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.60 | $27.40 |
| Family | MAX II | MAX II |
| Device | EPM570 | EPM570 |
| Logic Elements | 570 | β |
| Typical Macrocells | 440 | β |
| User I/Os | 116 | β |
| User Flash Memory (UFM) | 8 Kbits | β |
| Propagation Delay (tPD) | 5.4 ns (max) | β |
| Maximum Frequency (fMAX) | 300 MHz (typ) | β |
| Core Voltage | 3.3 V | β |
| Operating Temperature | 0C to +85C (commercial) | β |
| Package | TQFP-144 | 144-pin TQFP (20 mm Γ 20 mm Γ 1.4 mm) |
| Process | 0.18 Β΅m, 6-layer-metal flash CMOS | β |
| Programming Interface | JTAG (IEEE 1149.1), ISP | IEEE 1149.1 JTAG (ISP) |
| Mounting Type | Surface Mount | β |
| RoHS Status | Compliant | [DATA_NEEDED: rohs status] |
| Logic Elements (LEs) | β | 440 |
| Macro Cells | β | 440 |
| Maximum User I/O Pins | β | 160 |
| User Flash Memory | β | 4.0 Kbits |
| Logic Array Blocks (LABs) | β | 8 |
| Speed Grade | β | C3 (5.4 ns tPD1) |
| Process Technology | β | 0.18 Β΅m |
| Core Voltage (VCCINT) | β | 3.3 V (internal regulator generates 2.5 V core) |
| I/O Voltage (VCCIO) | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O) |
| Maximum Frequency (internal) | β | 304 MHz |
| Propagation Delay (tPD1) | β | 5.4 ns |
| Operating Temperature (Commercial) | β | 0 Β°C to +85 Β°C |
| Configuration | β | Non-volatile, instant-on (single-chip) |