EPM7096LC84-7 vs EPM7096LC84-10 Comparison
Detailed side-by-side comparison of EPM7096LC84-7 by Intel and EPM7096LC84-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7096LC84-7 | EPM7096LC84-10 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | MAX 7000 | MAX 7000 |
| Macrocells | 96 | 96 |
| Logic Array Blocks (LABs) | 4 | 4 |
| User I/O Pins | 64 | — |
| Speed Grade (tPD) | 7.5 ns | — |
| Package | 84-pin PLCC (Plastic Leaded Chip Carrier) | 84-PLCC (J-Lead) |
| Mounting Type | Surface Mount | Surface Mount (PLCC socket or SMT) |
| Supply Voltage | 5.0 V | — |
| Programming Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | Yes, via IEEE 1149.1 JTAG |
| Architecture | Second-generation MAX | — |
| I/O Logic Levels | 5.0 V TTL/CMOS-compatible | — |
| Operating Temperature | 0C to +70C (commercial, LC suffix) | — |
| RoHS Status | Non-compliant (original Altera product, leaded PLCC package) | [DATA_NEEDED: RoHS status] |
| Lifecycle Status | Obsolete - PCN/PDN issued by Intel | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum User I/O Pins | — | 36 |
| Propagation Delay (tPD) | — | 10 ns (-10 speed grade) |
| Process Technology | — | EEPROM-based, 5.0 V low-power CMOS (L) |
| Supply Voltage (VCC) | — | 5.0 V nominal (4.75 V - 5.25 V) |
| MultiVolt I/O | — | 2.5 V / 3.3 V / 5.0 V mixed-voltage interface |
| Operating Temperature Range | — | 0C to +70C (Commercial, 'C') |
| Configuration Memory | — | Non-volatile EEPROM (instant-on) |
| Programmable Interconnect | — | PIA (Programmable Interconnect Array) |