EPM7128AETC100-10N vs EPM570GT100C5N Comparison
Detailed side-by-side comparison of EPM7128AETC100-10N by Intel and EPM570GT100C5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128AETC100-10N - MAX 7000AE 128-Macrocell CPLD | Intel | TQFP-100
EPM7128AETC100-10N ObsoleteSpecification Comparison
| Parameter | EPM7128AETC100-10N | EPM570GT100C5N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Family | MAX 7000AE | — |
| Series | EPM7128AE | MAX II |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | — |
| Usable Gates | 2500 | — |
| Logic Array Blocks | 16 | — |
| User I/Os | 84 | — |
| Supply Voltage (Core) | 3.3 V | — |
| I/O Tolerance | 5.0 V tolerant | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Speed Grade | -10 | — |
| Maximum Frequency | [DATA_NEEDED: maximum toggle frequency] | 304 MHz |
| Package | TQFP-100 | TQFP-100 |
| Mounting Type | Surface Mount | Surface Mount |
| Programming | JTAG (IEEE 1149.1) ISP / EEPROM | — |
| Operating Temperature | 0C to +70C (commercial) | 0C to +85C (Commercial) |
| Lead-Free / RoHS | Yes (N suffix) | — |
| Process Technology | CMOS EEPROM | — |
| Architecture | Multiple Array MatriX (MAX) - 2nd generation | — |
| PCI Compliance | Yes (33 MHz, -10 grade per PCI SIG 2.2) | — |
| Logic Elements | — | 570 |
| Equivalent Macrocells | — | 440 |
| User I/O | — | 76 |
| LABs | — | 36 |
| Pin-to-Pin Delay | — | [DATA_NEEDED: tPD value] |
| User Flash Memory (UFM) | — | 8 Kbit |
| Operating Supply Voltage (VCCINT) | — | 2.5 V / 3.3 V |
| I/O Standards Supported | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVTTL/LVCMOS |
| Programmability | — | Flash-based, non-volatile (ISP via JTAG) |
| JTAG Support | — | IEEE 1149.1 boundary scan |
| RoHS Status | — | Compliant |