EPM7128AETC100-10N vs EPM7128AETC100-10 Comparison
Detailed side-by-side comparison of EPM7128AETC100-10N by Intel and EPM7128AETC100-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128AETC100-10N - MAX 7000AE 128-Macrocell CPLD | Intel | TQFP-100
EPM7128AETC100-10N ObsoleteSpecification Comparison
| Parameter | EPM7128AETC100-10N | EPM7128AETC100-10 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 7000AE | MAX 7000A |
| Series | EPM7128AE | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | 128 |
| Usable Gates | 2500 | 2.5K |
| Logic Array Blocks | 16 | — |
| User I/Os | 84 | 84 |
| Supply Voltage (Core) | 3.3 V | 3.3 V |
| I/O Tolerance | 5.0 V tolerant | 5.0 V tolerant |
| Pin-to-Pin Delay (tPD) | 10 ns | 10 ns |
| Speed Grade | -10 | — |
| Maximum Frequency | [DATA_NEEDED: maximum toggle frequency] | — |
| Package | TQFP-100 | 100-pin TQFP (ET) |
| Mounting Type | Surface Mount | — |
| Programming | JTAG (IEEE 1149.1) ISP / EEPROM | — |
| Operating Temperature | 0C to +70C (commercial) | -40C to +85C (commercial/industrial) |
| Lead-Free / RoHS | Yes (N suffix) | — |
| Process Technology | CMOS EEPROM | — |
| Architecture | Multiple Array MatriX (MAX) - 2nd generation | — |
| PCI Compliance | Yes (33 MHz, -10 grade per PCI SIG 2.2) | — |
| Logic Array Blocks (LABs) | — | 8 |
| Program Technology | — | EEPROM (in-system programmable) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| RoHS Status | — | Compliant |
| Lifecycle Status | — | Obsolete (migrate to MAX II or MAX V) |