EPM7128AETC100-10N vs EPM7128AETC100-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128AETC100-10N sa pamamagitan ng Intel at EPM7128AETC100-10 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM7128AETC100-10N - MAX 7000AE 128-Macrocell CPLD | Intel | TQFP-100
EPM7128AETC100-10N ObsoletePagsanggunian na paghahambing
| Parametro | EPM7128AETC100-10N | EPM7128AETC100-10 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 7000AE | MAX 7000A |
| Series | EPM7128AE | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | 128 |
| Usable Gates | 2500 | 2.5K |
| Logic Array Blocks | 16 | — |
| User I/Os | 84 | 84 |
| Supply Voltage (Core) | 3.3 V | 3.3 V |
| I/O Tolerance | 5.0 V tolerant | 5.0 V tolerant |
| Pin-to-Pin Delay (tPD) | 10 ns | 10 ns |
| Speed Grade | -10 | — |
| Maximum Frequency | [DATA_NEEDED: maximum toggle frequency] | — |
| Packhaging | TQFP-100 | 100-pin TQFP (ET) |
| Uri ng Pagpapasok | Surface Mount | — |
| Programming | JTAG (IEEE 1149.1) ISP / EEPROM | — |
| Temperature na Operasyon | 0C to +70C (commercial) | -40C to +85C (commercial/industrial) |
| Lead-Free / RoHS | Yes (N suffix) | — |
| Process Technology | CMOS EEPROM | — |
| Architecture | Multiple Array MatriX (MAX) - 2nd generation | — |
| PCI Compliance | Yes (33 MHz, -10 grade per PCI SIG 2.2) | — |
| Logic Array Blocks (LABs) | — | 8 |
| Program Technology | — | EEPROM (in-system programmable) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Tindminan RoHS | — | Compliant |
| Katayuan ng Lifecycle | — | Obsolete (migrate to MAX II or MAX V) |