EPM7128AETI100-7N vs EPM7128AETC100-7N Comparison
Detailed side-by-side comparison of EPM7128AETI100-7N by Altera and EPM7128AETC100-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128AETI100-7N - MAX 7000A CPLD 128 Macro 84 I/O | Intel/Altera
EPM7128AETI100-7N ObsoleteSpecification Comparison
| Parameter | EPM7128AETI100-7N | EPM7128AETC100-7N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $28.50 | $31.80 |
| Series | MAX 7000A | β |
| Family | MAX 7000A CPLD | MAX 7000A |
| Macro Cells | 128 | 128 |
| Number of Usable Gates | 2,500 | β |
| Number of I/O | 84 | β |
| Number of Logic Array Blocks (LABs) | 8 | β |
| Propagation Delay (tPD max) | 7 ns | β |
| Maximum Operating Frequency (fCNT) | 129.9 MHz | β |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | β |
| I/O Bank Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (multi-volt I/O) | β |
| Process Technology | CMOS EEPROM | 0.30 Β΅m EEPROM CMOS |
| Package | 100-pin TQFP (14x14 mm) | 100-TQFP |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | -40C to +85C (Industrial) | 0 C to +70 C (Commercial) |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | β |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS status] |
| Device Type | β | CPLD - Complex Programmable Logic Device |
| Usable Gates | β | 2,500 |
| Logic Array Blocks (LABs) | β | 4 |
| User I/Os | β | 84 |
| Propagation Delay (tpd) | β | 7.5 ns |
| Counter Frequency (max) | β | 129.9 MHz |
| Internal Frequency (max) | β | 250 MHz |
| Core Supply Voltage | β | 3.3 V |
| Logic Family | β | CMOS |
| Pin Count | β | 100 |
| Programming Interface | β | JTAG (IEEE 1149.1) / ISP |