EPM7128ATC100-10 vs EPM7128AET1100-7 Comparison

Detailed side-by-side comparison of EPM7128ATC100-10 by Altera and EPM7128AET1100-7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPM7128AET1100-7 EPM7128AET1100-7 - 128-Macrocell MAX 7000A CPLD | Intel

EPM7128AET1100-7 - 128-Macrocell MAX 7000A CPLD | Intel

EPM7128AET1100-7 ⚠ Last Time Buy

Specification Comparison

Parameter EPM7128ATC100-10 EPM7128AET1100-7
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last Time Buy
Product Type CPLD (Complex Programmable Logic Device) —
Family MAX 7000A MAX 7000A (MAX 7000AE)
Architecture Multiple Array MatriX (MAX) —
Macrocells 128 128
Logic Array Blocks (LABs) 4 —
Usable Gates 2.5K 2,500
User I/O Pins 68 84
Pin-to-Pin Logic Delay 4.5 ns —
Counter Frequency (max) 227.3 MHz —
Speed Grade -10 (10 ns) -7 (5 ns pin-to-pin)
Core Supply Voltage 3.3 V —
I/O Logic Level Support 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
Program Memory EEPROM (non-volatile) —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
Package 100-pin TQFP (TC100) TQFP-100
Mounting Type Surface Mount Surface Mount
Operating Temperature 0C to +70C (commercial) -40C to +85C (industrial)
RoHS Status [DATA_NEEDED: RoHS compliance] ROHS3 Compliant
Device Type — CPLD (Complex Programmable Logic Device)
Logic Elements / LABs — [DATA_NEEDED: LAB count for 7128A]
Supply Voltage VCC — 5.0 V (typical)
I/O Voltage Tolerance — 3.3 V / 5.0 V
Configuration Memory — EEPROM (non-volatile, instant-on)
Programming Interface — IEEE 1149.1 JTAG / ByteBlaster
MSL Level — 3 (168 hours, per JEDEC J-STD-020)
Lead-Free — Yes
Process Technology — CMOS, EEPROM-based

Datasheets & Resources

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