EPM7128ATC144-10 vs EPM7128AETC144-10N Comparison
Detailed side-by-side comparison of EPM7128ATC144-10 by Altera and EPM7128AETC144-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7128ATC144-10 | EPM7128AETC144-10N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.10 | $22.56 |
| Manufacturer | Altera (now Intel) | — |
| Series | MAX 7000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Programmable Type | EE PLD (EEPROM-based, in-system programmable) | — |
| Macrocells | 128 | — |
| Logic Array Blocks | 4 | — |
| User I/O Pins | 68 | — |
| Propagation Delay (tPD) | 10 ns | 10 ns (grade -10) |
| Maximum Counter Frequency | 98 MHz | — |
| Supply Voltage - Internal (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Voltage Levels | 5.0 V / 3.3 V / 2.5 V compatible (MultiVolt I/O) | — |
| In-System Programmability | Yes (IEEE Std 1149.1 JTAG) | — |
| Operating Temperature | 0C to +70C (commercial) | 0 C to +70 C (commercial) |
| Package / Case | 144-TQFP (20 x 20 mm) | — |
| Mounting Type | Surface Mount | Surface Mount |
| Architecture | Multiple Array Matrix (MAX), 2nd generation | — |
| RoHS Status | unknown (legacy Altera device) | [DATA_NEEDED: rohs status] |
| Family | — | MAX 7000A |
| Number of Macros | — | 128 |
| Logic Gates | — | 2,500 usable gates |
| Number of I/O Pins | — | 100 (max user I/O) |
| Internal Frequency | — | Up to 250 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Standards | — | 2.5 V / 3.3 V / 5 V multiVolt |
| Configuration Memory | — | CMOS EEPROM (non-volatile) |
| JTAG Support | — | IEEE 1149.1 compliant boundary-scan |
| Package | — | 144-pin TQFP (T144) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |