EPM7128ELC84-10 vs EPM7128SLC84-6N Comparison
Detailed side-by-side comparison of EPM7128ELC84-10 by Intel and EPM7128SLC84-6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128SLC84-6N - MAX 7000S CPLD, 128 Macro, 6ns, 84-PLCC | Intel
EPM7128SLC84-6N ⚠ Last Time BuySpecification Comparison
| Parameter | EPM7128ELC84-10 | EPM7128SLC84-6N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Last Time Buy |
| Family | MAX 7000 | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | — |
| Equivalent Logic Gates | [DATA_NEEDED: equivalent gate count from datasheet] | — |
| User I/Os | 68 | — |
| Dedicated Inputs | 12 | — |
| Operating Voltage (VCCINT/VCClO) | 5 V | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Counter Frequency (fCNT) | [DATA_NEEDED: fCNT from datasheet] | — |
| Package | 84-pin PLCC (J-Lead) | 84-pin PLCC (J-lead) |
| Mounting Type | Surface Mount / Socket | — |
| Operating Temperature | 0C to +70C (Commercial) | [DATA_NEEDED: operating temperature range] |
| Technology | EEPROM-based CMOS | — |
| Programming Interface | IEEE 1149.1 (JTAG) ISP | — |
| In-System Programmable | Yes | — |
| RoHS Status | [DATA_NEEDED: RoHS status from datasheet] | Non-Compliant (legacy 5V part) |
| Lead-Free | [DATA_NEEDED: lead-free status from datasheet] | — |
| Device System Gates | — | 2500 |
| Number of Macro Cells | — | 128 |
| Number of User I/Os | — | 68 |
| Number of Logic Blocks/Elements | — | 8 |
| Number of Global Clocks | — | 2 |
| Product Terms per Macro Cell | — | 32 |
| Maximum Operating Frequency | — | 147.1 MHz |
| Pin-to-Pin Delay (Speed Grade) | — | 6 ns |
| Supply Voltage | — | 5 V |
| Process Technology | — | CMOS, EEPROM |
| Program Memory Type | — | EEPROM |
| In-System Programmability | — | Yes (ISP via JTAG) |