EPM7128ELC84-10 vs EPM7128SLC84-6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128ELC84-10 sa pamamagitan ng Intel at EPM7128SLC84-6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM7128SLC84-6N - MAX 7000S CPLD, 128 Macro, 6ns, 84-PLCC | Intel
EPM7128SLC84-6N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPM7128ELC84-10 | EPM7128SLC84-6N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Family | MAX 7000 | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | — |
| Equivalent Logic Gates | [DATA_NEEDED: equivalent gate count from datasheet] | — |
| User I/Os | 68 | — |
| Dedicated Inputs | 12 | — |
| Operating Voltage (VCCINT/VCClO) | 5 V | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Counter Frequency (fCNT) | [DATA_NEEDED: fCNT from datasheet] | — |
| Packhaging | 84-pin PLCC (J-Lead) | 84-pin PLCC (J-lead) |
| Uri ng Pagpapasok | Surface Mount / Socket | — |
| Temperature na Operasyon | 0C to +70C (Commercial) | [DATA_NEEDED: operating temperature range] |
| Technology | EEPROM-based CMOS | — |
| Programming Interface | IEEE 1149.1 (JTAG) ISP | — |
| In-System Programmable | Yes | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status from datasheet] | Non-Compliant (legacy 5V part) |
| Lead-Free | [DATA_NEEDED: lead-free status from datasheet] | — |
| Device System Gates | — | 2500 |
| Number of Macro Cells | — | 128 |
| Number of User I/Os | — | 68 |
| Number of Logic Blocks/Elements | — | 8 |
| Number of Global Clocks | — | 2 |
| Product Terms per Macro Cell | — | 32 |
| Maximum Operating Frequency | — | 147.1 MHz |
| Pin-to-Pin Delay (Speed Grade) | — | 6 ns |
| Volte ng Pagbibigay | — | 5 V |
| Process Technology | — | CMOS, EEPROM |
| Program Memory Type | — | EEPROM |
| In-System Programmability | — | Yes (ISP via JTAG) |