EPM7128ELC84-12 vs EPM7128SLC84-15 Comparison
Detailed side-by-side comparison of EPM7128ELC84-12 by Altera and EPM7128SLC84-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128SLC84-15 - 128-Macrocell MAX 7000S CPLD, 84-PLCC | Intel / Altera
EPM7128SLC84-15 ⚠ Last Time BuySpecification Comparison
| Parameter | EPM7128ELC84-12 | EPM7128SLC84-15 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last Time Buy |
| Family | MAX 7000 (MAX 7000E series) | MAX 7000S |
| Logic Family | CMOS, EEPROM-based | — |
| Usable Gates | 2,500 | 2,500 |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | — |
| User I/Os | 84 | 68 (in 84-PLCC) |
| Propagation Delay (tpd1) | 12 ns | — |
| Internal Global Clock Frequency | 90.9 MHz | — |
| Setup Time | 4.5 ns | — |
| Supply Voltage (VCCINT / VCCIO) | 5 V (4.75 V to 5.25 V) | — |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Package | 84-pin PLCC (J-Lead, QCCJ) | 84-Pin PLCC (J-Lead, J84) |
| Mounting Type | Surface Mount (PLCC socket compatible) | Surface Mount / Socketed (PLCC-84 socket) |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE Std. 1149.1), in-system programmable |
| Pin Count | 84 | — |
| RoHS Status | Non-compliant (legacy 5V part, SnPb finish) | Non-RoHS (legacy 5V part) |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Speed Grade | — | -15 (15 ns pin-to-pin delay) |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Internal Frequency (fMAX) | — | 76.9 MHz |
| Logic Family / Process | — | CMOS, 5V, EEPROM |
| Supply Voltage (VCCINT) | — | 5 V |
| I/O Standard Support | — | 5.0 V TTL/CMOS (multi-volt I/O compatible with 3.3V) |
| Configuration Memory | — | Non-volatile EEPROM (instant-on, no boot PROM) |