EPM7128ELI84-20 vs EPM7128SLC84-6N Comparison
Detailed side-by-side comparison of EPM7128ELI84-20 by Intel and EPM7128SLC84-6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128ELI84-20 - 128-Macrocell CPLD, 20ns, 84-PLCC | Intel / Altera
EPM7128ELI84-20 ⚠ Last Time BuyIntel
EPM7128SLC84-6N - MAX 7000S CPLD, 128 Macro, 6ns, 84-PLCC | Intel
EPM7128SLC84-6N ⚠ Last Time BuySpecification Comparison
| Parameter | EPM7128ELI84-20 | EPM7128SLC84-6N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | Last Time Buy |
| Family | MAX 7000 (Classic / MAX 7000B/E) | MAX 7000S |
| Device Name | EPM7128E | — |
| Macro Cells | 128 | — |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | 8 | — |
| Maximum User I/Os | 68 | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Maximum Operating Frequency (fCNT) | 62.5 MHz | — |
| Supply Voltage (VCCINT) | 5 V (4.75 V to 5.25 V for -20 speed grade) | — |
| Operating Temperature | -40 °C to +85 °C (Industrial) | [DATA_NEEDED: operating temperature range] |
| Package | 84-pin PLCC (J-Lead) | 84-pin PLCC (J-lead) |
| Programming Interface | JTAG (IEEE 1149.1) + ISP | — |
| Technology | EEPROM-based CMOS | — |
| Mounting Type | Surface Mount / Socketable (PLCC J-Lead) | — |
| RoHS Status | Compliant (lead-free PLCC variant) | Non-Compliant (legacy 5V part) |
| Device System Gates | — | 2500 |
| Number of Macro Cells | — | 128 |
| Number of User I/Os | — | 68 |
| Number of Logic Blocks/Elements | — | 8 |
| Number of Global Clocks | — | 2 |
| Product Terms per Macro Cell | — | 32 |
| Maximum Operating Frequency | — | 147.1 MHz |
| Pin-to-Pin Delay (Speed Grade) | — | 6 ns |
| Supply Voltage | — | 5 V |
| Process Technology | — | CMOS, EEPROM |
| Program Memory Type | — | EEPROM |
| In-System Programmability | — | Yes (ISP via JTAG) |