EPM7128ELI84-20 vs EPM7128SLC84-6N 比較
詳細並排比較 EPM7128ELI84-20 由 Intel 與 EPM7128SLC84-6N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7128ELI84-20 | EPM7128SLC84-6N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | 最後購買 |
| Family | MAX 7000 (Classic / MAX 7000B/E) | MAX 7000S |
| Device Name | EPM7128E | — |
| Macro Cells | 128 | — |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | 8 | — |
| Maximum User I/Os | 68 | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Maximum Operating Frequency (fCNT) | 62.5 MHz | — |
| Supply Voltage (VCCINT) | 5 V (4.75 V to 5.25 V for -20 speed grade) | — |
| 工作溫度 | -40 °C to +85 °C (Industrial) | [DATA_NEEDED: operating temperature range] |
| 封裝 | 84-pin PLCC (J-Lead) | 84-pin PLCC (J-lead) |
| Programming Interface | JTAG (IEEE 1149.1) + ISP | — |
| Technology | EEPROM-based CMOS | — |
| 安裝類型 | Surface Mount / Socketable (PLCC J-Lead) | — |
| RoHS 狀態 | Compliant (lead-free PLCC variant) | Non-Compliant (legacy 5V part) |
| Device System Gates | — | 2500 |
| Number of Macro Cells | — | 128 |
| Number of User I/Os | — | 68 |
| Number of Logic Blocks/Elements | — | 8 |
| Number of Global Clocks | — | 2 |
| Product Terms per Macro Cell | — | 32 |
| Maximum Operating Frequency | — | 147.1 MHz |
| Pin-to-Pin Delay (Speed Grade) | — | 6 ns |
| 供應電壓 | — | 5 V |
| Process Technology | — | CMOS, EEPROM |
| Program Memory Type | — | EEPROM |
| In-System Programmability | — | Yes (ISP via JTAG) |