EPM7128ELI84-20 vs EPM7128SLI84-10N Comparison
Detailed side-by-side comparison of EPM7128ELI84-20 by Intel and EPM7128SLI84-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128ELI84-20 - 128-Macrocell CPLD, 20ns, 84-PLCC | Intel / Altera
EPM7128ELI84-20 ⚠ Last Time BuyAltera
EPM7128SLI84-10N - MAX 7000S CPLD 128 Macro 10ns 84-PLCC | Intel / Altera
EPM7128SLI84-10N NrndSpecification Comparison
| Parameter | EPM7128ELI84-20 | EPM7128SLI84-10N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | NRND |
| Family | MAX 7000 (Classic / MAX 7000B/E) | MAX 7000S |
| Device Name | EPM7128E | — |
| Macro Cells | 128 | — |
| Usable Gates | 2,500 | 2,500 |
| Logic Array Blocks (LABs) | 8 | — |
| Maximum User I/Os | 68 | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Maximum Operating Frequency (fCNT) | 62.5 MHz | — |
| Supply Voltage (VCCINT) | 5 V (4.75 V to 5.25 V for -20 speed grade) | 4.75 V to 5.25 V (5 V typical) |
| Operating Temperature | -40 °C to +85 °C (Industrial) | -40 C to +85 C (Industrial) |
| Package | 84-pin PLCC (J-Lead) | 84-pin PLCC (J-Lead) |
| Programming Interface | JTAG (IEEE 1149.1) + ISP | — |
| Technology | EEPROM-based CMOS | — |
| Mounting Type | Surface Mount / Socketable (PLCC J-Lead) | Surface Mount |
| RoHS Status | Compliant (lead-free PLCC variant) | [DATA_NEEDED: RoHS compliance per latest Intel/Altera declaration] |
| Logic Cells / Macro Cells | — | 128 macro cells |
| Number of Logic Elements / Blocks | — | 16 Logic Array Blocks (LABs) |
| User I/Os | — | 68 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Frequency (fMAX) | — | 125 MHz |
| I/O Voltage Tolerance | — | 3.3 V / 5 V MultiVolt I/O |
| Process Technology | — | CMOS EEPROM |
| Programmability | — | In-system programmable (ISP), non-volatile EEPROM |
| Boundary-Scan (JTAG) | — | IEEE Std 1149.1 compliant |
| Lead-Free | — | [DATA_NEEDED: lead-free per latest Intel/Altera declaration] |