EPM7128SLC8410 vs EPM7128SLC84-15 Comparison

Detailed side-by-side comparison of EPM7128SLC8410 by Intel and EPM7128SLC84-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128SLC8410 EPM7128SLC84-15
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last Time Buy
Product Type CPLD (Complex Programmable Logic Device) —
Family MAX 7000S MAX 7000S
Macrocells 128 128
Logic Elements / Gates 2500 usable gates —
User I/O Pins 68 —
Number of Logic Array Blocks (LABs) 8 —
Propagation Delay (tPD) 10 ns 15 ns
Setup Time (tSU) 7 ns —
Maximum Operating Frequency 125 MHz (counter) —
Supply Voltage (VCCINT) 4.75 V to 5.25 V (5 V nominal) 5 V
I/O Voltage (MultiVolt) 2.5 V / 3.3 V / 5.0 V —
Program Memory Type EEPROM (in-system programmable) —
JTAG Support IEEE Std 1149.1 boundary-scan —
Package 84-pin PLCC (J-lead) 84-Pin PLCC (J-Lead, J84)
Operating Temperature 0C to +70C (commercial) 0C to +70C (commercial)
Mounting Type Surface Mount (PLCC socket or direct solder) Surface Mount / Socketed (PLCC-84 socket)
RoHS Status [DATA_NEEDED: RoHS status - not stated in verified data] Non-RoHS (legacy 5V part)
Device Type — CPLD - Complex Programmable Logic Device
Usable Gates — 2,500
User I/Os — 68 (in 84-PLCC)
Speed Grade — -15 (15 ns pin-to-pin delay)
Maximum Internal Frequency (fMAX) — 76.9 MHz
Logic Family / Process — CMOS, 5V, EEPROM
I/O Standard Support — 5.0 V TTL/CMOS (multi-volt I/O compatible with 3.3V)
Programming Interface — JTAG (IEEE Std. 1149.1), in-system programmable
Configuration Memory — Non-volatile EEPROM (instant-on, no boot PROM)

Datasheets & Resources

Browse All Products Create BOM Request Quote