EPM7128SLC8410 vs EPM7128SLC84-6N Comparison
Detailed side-by-side comparison of EPM7128SLC8410 by Intel and EPM7128SLC84-6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128SLC84-6N - MAX 7000S CPLD, 128 Macro, 6ns, 84-PLCC | Intel
EPM7128SLC84-6N ⚠ Last Time BuySpecification Comparison
| Parameter | EPM7128SLC8410 | EPM7128SLC84-6N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last Time Buy |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 7000S | MAX 7000S |
| Macrocells | 128 | — |
| Logic Elements / Gates | 2500 usable gates | — |
| User I/O Pins | 68 | — |
| Number of Logic Array Blocks (LABs) | 8 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Setup Time (tSU) | 7 ns | — |
| Maximum Operating Frequency | 125 MHz (counter) | 147.1 MHz |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5 V nominal) | — |
| I/O Voltage (MultiVolt) | 2.5 V / 3.3 V / 5.0 V | — |
| Program Memory Type | EEPROM (in-system programmable) | EEPROM |
| JTAG Support | IEEE Std 1149.1 boundary-scan | — |
| Package | 84-pin PLCC (J-lead) | 84-pin PLCC (J-lead) |
| Operating Temperature | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Mounting Type | Surface Mount (PLCC socket or direct solder) | — |
| RoHS Status | [DATA_NEEDED: RoHS status - not stated in verified data] | Non-Compliant (legacy 5V part) |
| Device System Gates | — | 2500 |
| Number of Macro Cells | — | 128 |
| Number of User I/Os | — | 68 |
| Number of Logic Blocks/Elements | — | 8 |
| Number of Global Clocks | — | 2 |
| Product Terms per Macro Cell | — | 32 |
| Pin-to-Pin Delay (Speed Grade) | — | 6 ns |
| Supply Voltage | — | 5 V |
| Process Technology | — | CMOS, EEPROM |
| In-System Programmability | — | Yes (ISP via JTAG) |