EPM7128SLC8410 vs EPM7128SLC84-6N 比較
詳細並排比較 EPM7128SLC8410 由 Intel 與 EPM7128SLC84-6N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7128SLC8410 | EPM7128SLC84-6N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 7000S | MAX 7000S |
| Macrocells | 128 | — |
| Logic Elements / Gates | 2500 usable gates | — |
| User I/O Pins | 68 | — |
| Number of Logic Array Blocks (LABs) | 8 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Setup Time (tSU) | 7 ns | — |
| Maximum Operating Frequency | 125 MHz (counter) | 147.1 MHz |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5 V nominal) | — |
| I/O Voltage (MultiVolt) | 2.5 V / 3.3 V / 5.0 V | — |
| Program Memory Type | EEPROM (in-system programmable) | EEPROM |
| JTAG Support | IEEE Std 1149.1 boundary-scan | — |
| 封裝 | 84-pin PLCC (J-lead) | 84-pin PLCC (J-lead) |
| 工作溫度 | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| 安裝類型 | Surface Mount (PLCC socket or direct solder) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status - not stated in verified data] | Non-Compliant (legacy 5V part) |
| Device System Gates | — | 2500 |
| Number of Macro Cells | — | 128 |
| Number of User I/Os | — | 68 |
| Number of Logic Blocks/Elements | — | 8 |
| Number of Global Clocks | — | 2 |
| Product Terms per Macro Cell | — | 32 |
| Pin-to-Pin Delay (Speed Grade) | — | 6 ns |
| 供應電壓 | — | 5 V |
| Process Technology | — | CMOS, EEPROM |
| In-System Programmability | — | Yes (ISP via JTAG) |