EPM7128SQC100-10N vs EPM7128SQI100-10 Comparison

Detailed side-by-side comparison of EPM7128SQC100-10N by Altera and EPM7128SQI100-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128SQC100-10N EPM7128SQI100-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $14.95 $9.75
Family MAX 7000 MAX 7000S
Device Type CPLD (Complex Programmable Logic Device) CPLD - Complex Programmable Logic Device
Macro Cells 128 128
Usable Gates 2,500 2,500
Logic Array Blocks (LABs) 8 (16 macro cells each) β€”
User I/O Pins 84 β€”
Propagation Delay (tPD) 10 ns β€”
Maximum Frequency 100 MHz β€”
Supply Voltage (VCCINT) 5 V (4.75 V to 5.25 V) β€”
I/O Voltage Tolerance 3.3 V or 5 V (MultiVolt interface) β€”
Package 100-pin PQFP (BQFP) β€”
Configuration Memory EEPROM (non-volatile) EEPROM (non-volatile)
Programming Interface JTAG (IEEE Std 1149.1), 4-pin β€”
Operating Temperature -40C to +85C (industrial) -40C to +85C (Industrial)
Mounting Type Surface Mount β€”
Lead-Free / RoHS Status Lead-free (N suffix) β€”
Architecture Generation Second-generation MAX β€”
User I/Os β€” 84
Logic Blocks (LABs) β€” 8 (16 macrocells each)
Package Type β€” PQFP-100
Pin-to-Pin Delay (tPD) β€” 10 ns
Maximum Internal Frequency β€” 125 MHz to 250 MHz
Counter Speed β€” Up to 175.4 MHz
Operating Voltage (VCC) β€” 5 V
Program/Erase Cycles β€” 100 minimum
In-System Programming β€” Yes (JTAG IEEE 1149.1)
Logic Family β€” CMOS
I/O Compatibility β€” TTL-compatible, 5V/3.3V multi-voltage
RoHS Status β€” [DATA_NEEDED: RoHS status not in provided data]

Datasheets & Resources

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