EPM7128SQI100-10 vs EPM7128SQC100-7N Comparison
Detailed side-by-side comparison of EPM7128SQI100-10 by Altera and EPM7128SQC100-7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128SQI100-10
EPM7128SQI100-10 - MAX 7000S CPLD 128-Macrocell 84-IO 10ns | Altera
EPM7128SQI100-10 ObsoleteIntel
EPM7128SQC100-7N
EPM7128SQC100-7N - MAX 7000 CPLD, 128 Macrocells, 7.5ns, 100-Pin PQFP | Intel (Altera)
EPM7128SQC100-7N ObsoleteSpecification Comparison
| Parameter | EPM7128SQI100-10 | EPM7128SQC100-7N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.75 | $7.10 |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD - Complex Programmable Logic Device |
| Macro Cells | 128 | β |
| User I/Os | 84 | β |
| Usable Gates | 2,500 | 2,500 |
| Logic Blocks (LABs) | 8 (16 macrocells each) | β |
| Package Type | PQFP-100 | β |
| Pin-to-Pin Delay (tPD) | 10 ns | 7.5 ns |
| Maximum Internal Frequency | 125 MHz to 250 MHz | β |
| Counter Speed | Up to 175.4 MHz | 175.4 MHz |
| Operating Voltage (VCC) | 5 V | β |
| Operating Temperature | -40C to +85C (Industrial) | 0C to +70C (commercial) |
| Configuration Memory | EEPROM (non-volatile) | β |
| Program/Erase Cycles | 100 minimum | β |
| In-System Programming | Yes (JTAG IEEE 1149.1) | β |
| Logic Family | CMOS | β |
| I/O Compatibility | TTL-compatible, 5V/3.3V multi-voltage | β |
| RoHS Status | [DATA_NEEDED: RoHS status not in provided data] | Compliant (lead-free 'N' suffix) |
| Program Memory Type | β | EEPROM |
| Number of Macrocells | β | 128 |
| Number of Logic Array Blocks | β | 8 |
| Number of Global Clocks | β | 2 |
| Product Terms per Macrocell | β | 32 |
| System Gates | β | 5,000 (max) |
| Maximum User I/Os | β | 84 |
| In-System Programmability | β | Yes (IEEE 1149.1 JTAG) |
| Operating Voltage (Core) | β | 5.0 V |
| I/O Standard Support | β | multiVolt (2.5V, 3.3V, 5.0V) |
| Package | β | 100-pin PQFP (QFP-100) |
| Process Technology | β | 0.30 Β΅m CMOS EEPROM |
| Security Bit | β | Programmable (one per device) |