EPM7128STC100-10N vs EPM7128AETC100-7N Comparison
Detailed side-by-side comparison of EPM7128STC100-10N by Altera and EPM7128AETC100-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128STC100-10N - MAX 7000S CPLD 128-Macrocell 10ns TQFP-100 | Altera
EPM7128STC100-10N NrndSpecification Comparison
| Parameter | EPM7128STC100-10N | EPM7128AETC100-7N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | NRND |
| Family | MAX 7000S | MAX 7000A |
| Product Type | CPLD - Complex Programmable Logic Device | — |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | 2,500 |
| Logic Array Blocks (LABs) | 8 (16 macrocells each) | 4 |
| User I/Os | 84 | 84 |
| Propagation Delay (tPD) | 10 ns | — |
| Internal Frequency (fMAX) | 100 MHz | — |
| Supply Voltage (VCCINT) | 5 V | — |
| I/O Voltage (VCCIO) | 3.3 V or 5 V (MultiVolt) | — |
| Process Technology | CMOS EEPROM | 0.30 µm EEPROM CMOS |
| Package | 100-pin TQFP (14 x 14 x 1 mm) | 100-TQFP |
| Operating Temperature | 0 C to +70 C (commercial) | 0 C to +70 C (Commercial) |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Compliant (Pb-free "N" suffix) | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes | — |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Macro Cells | — | 128 |
| Propagation Delay (tpd) | — | 7.5 ns |
| Counter Frequency (max) | — | 129.9 MHz |
| Internal Frequency (max) | — | 250 MHz |
| Core Supply Voltage | — | 3.3 V |
| Logic Family | — | CMOS |
| Pin Count | — | 100 |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |