EPM7128STC100-7 vs EPM7128STC100-10N Comparison
Detailed side-by-side comparison of EPM7128STC100-7 by Intel and EPM7128STC100-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128STC100-10N - MAX 7000S CPLD 128-Macrocell 10ns TQFP-100 | Altera
EPM7128STC100-10N NrndSpecification Comparison
| Parameter | EPM7128STC100-7 | EPM7128STC100-10N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Series | MAX 7000S | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 128 | — |
| Usable Gates | 2,500 | 2,500 |
| Logic Array Blocks (LABs) | 8 | 8 (16 macrocells each) |
| User I/Os | 84 | 84 |
| Propagation Delay (tPD) | 7.5 ns | 10 ns |
| Internal Frequency | 125 MHz | — |
| Supply Voltage (VCCINT) | 5 V | 5 V |
| Logic Family | CMOS | — |
| Programmable Pin Count | 100 | — |
| Package | 100-Pin TQFP (TQFP-100) | 100-pin TQFP (14 x 14 x 1 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +70C (Commercial) | 0 C to +70 C (commercial) |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | Yes (IEEE 1149.1 JTAG) |
| Configuration Memory | EEPROM (non-volatile) | — |
| RoHS Status | [DATA_NEEDED: rohs status] | Compliant (Pb-free "N" suffix) |
| Family | — | MAX 7000S |
| Product Type | — | CPLD - Complex Programmable Logic Device |
| Macrocells | — | 128 |
| Internal Frequency (fMAX) | — | 100 MHz |
| I/O Voltage (VCCIO) | — | 3.3 V or 5 V (MultiVolt) |
| Process Technology | — | CMOS EEPROM |
| Lead-Free | — | Yes |