EPM7128STC100-7 vs EPM7128STC100-6 Comparison
Detailed side-by-side comparison of EPM7128STC100-7 by Intel and EPM7128STC100-6 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7128STC100-7 | EPM7128STC100-6 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Series | MAX 7000S | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 128 | — |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | 8 | — |
| User I/Os | 84 | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Internal Frequency | 125 MHz | — |
| Supply Voltage (VCCINT) | 5 V | — |
| Logic Family | CMOS | — |
| Programmable Pin Count | 100 | — |
| Package | 100-Pin TQFP (TQFP-100) | 100-pin TQFP (STC100) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | — |
| Configuration Memory | EEPROM (non-volatile) | On-chip EEPROM (non-volatile) |
| RoHS Status | [DATA_NEEDED: rohs status] | — |
| Family | — | MAX 7000S |
| Macrocells | — | 128 |
| Equivalent Gates | — | 2,500 |
| User I/O Pins | — | 84 |
| Pin-to-Pin Delay (tPD) | — | 6 ns |
| Maximum Internal Frequency (fCNT) | — | 147.1 MHz |
| Supply Voltage (VCCINT / VCCIO) | — | 5 V |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) / ISP |
| PCI Compliance | — | 33 MHz PCI Local Bus Rev. 2.2 (-6/-7/-10 grades) |
| Lead Pitch | — | 1.0 mm (TQFP) |
| Lead-Free / RoHS | — | Contains lead (non-RoHS original; -6N variant is lead-free) |