EPM7160ELC84-12 vs EPM7160ELC84-15 Comparison
Detailed side-by-side comparison of EPM7160ELC84-12 by Altera and EPM7160ELC84-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7160ELC84-12 - MAX 7000 CPLD, 160 Macrocells, 12ns | Altera
EPM7160ELC84-12 ⚠ Last Time Buy
Specification Comparison
| Parameter | EPM7160ELC84-12 | EPM7160ELC84-15 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | Obsolete |
| Manufacturer | Altera (Intel PSG) | — |
| Series | MAX 7000 (MAX 7000E) | — |
| Programmable Type | EE PLD (EEPROM) | — |
| Number of Macrocells | 160 | — |
| Number of Logic Array Blocks (LABs) | 4 | — |
| Number of Usable Gates | 3,200 | — |
| Number of I/O (max) | 68 | — |
| Number of I/O (per package) | 64 | — |
| Propagation Delay tpd(1) max | 12 ns | — |
| Counter Frequency (max) | 90.9 MHz | — |
| Voltage Supply - Internal | 4.75 V to 5.25 V (5 V nominal) | — |
| Operating Temperature | 0C to +70C (commercial) | 0 C to +70 C (commercial) |
| Package / Case | 84-LCC (J-Lead) | — |
| Supplier Device Package | 84-PLCC (29.31 x 29.31 mm) | — |
| Mounting Type | Surface Mount | Surface Mount (PLCC socket compatible) |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | Yes (IEEE 1149.1 JTAG) |
| RoHS Status | [DATA_NEEDED: RoHS status] | Contains lead / RoHS non-compliant (per Altera listing) |
| Family | — | MAX 7000 |
| Product Type | — | CPLD - Complex Programmable Logic Device |
| Architecture | — | EEPROM-based, second-generation MAX |
| Usable Gates | — | 3,200 |
| Macrocells | — | 160 |
| Logic Array Blocks | — | 4 |
| Maximum I/O Pins | — | 36 |
| Pin-to-Pin Delay | — | 15 ns |
| Counter Frequency | — | 76.9 MHz |
| Supply Voltage (Vcc) | — | 5 V |
| Package Type | — | 84-pin PLCC (J-Lead) |