EPM7160SLC84-10N vs EPM7160SLI84-10 Comparison
Detailed side-by-side comparison of EPM7160SLC84-10N by Intel and EPM7160SLI84-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7160SLC84-10N
EPM7160SLC84-10N - MAX 7000S CPLD 160 Macrocells 84-PLCC | Intel
EPM7160SLC84-10N ObsoleteIntel
EPM7160SLI84-10
EPM7160SLI84-10 - MAX 7000S CPLD, 160 Macrocells, 84-PLCC | Intel
EPM7160SLI84-10 β Last Time BuySpecification Comparison
| Parameter | EPM7160SLC84-10N | EPM7160SLI84-10 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.85 | $0.00 |
| Family | MAX 7000S | CPLD - Complex Programmable Logic Device |
| Logic Elements / Macrocells | 160 macrocells | β |
| Usable Gates | 3,200 gates | 3,200 |
| Logic Array Blocks (LABs) | 4 | β |
| User I/O Pins | 64 (also reported as 60 or 36 depending on variant) | 64 |
| Pin-to-Pin Delay (tPD) | 10 ns | β |
| Counter Speed (fCNT) | up to 175.4 MHz | β |
| Maximum Operating Frequency | 100 MHz | β |
| Supply Voltage - Core (VCC) | 5.0 V | β |
| I/O Supply Voltage (VCCIO) | 3.3 V or 5.0 V | β |
| Configuration Memory | EEPROM (non-volatile) | β |
| In-System Programming | Yes, via IEEE Std. 1149.1 JTAG | β |
| Program / Erase Cycles | 100 minimum | β |
| Data Retention | 20 years minimum | β |
| Package | 84-pin PLCC (J-lead, surface mount) | 84-pin PLCC (LCC-84) |
| Operating Temperature Grade | Commercial (0C to +70C) | β |
| Lead-Free / RoHS | Yes (-N suffix indicates lead-free) | β |
| Mounting Type | Surface Mount | Surface Mount / Through-Hole (socket) |
| Series | β | MAX 7000S |
| Macrocells | β | 160 |
| Logic Elements | β | 160 |
| Propagation Delay (tpd) | β | 10 ns |
| Internal Counter Frequency | β | 167 MHz |
| Operating Frequency (max) | β | 100 MHz |
| Supply Voltage | β | 5.0 V |
| Technology | β | CMOS, EEPROM-based |
| Operating Temperature | β | 0C to +70C (Commercial) |
| Programmability | β | In-System (JTAG IEEE 1149.1) + EEPROM |
| MultiVolt I/O | β | Yes (2.5V / 3.3V / 5V) |
| I/O Standards | β | LVTTL, LVCMOS, TTL, CMOS |
| RoHS Status | β | [DATA_NEEDED: RoHS status] |