EPM7192SQC160-7N vs EPM7192SQI160-10N Comparison
Detailed side-by-side comparison of EPM7192SQC160-7N by Altera and EPM7192SQI160-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7192SQC160-7N - MAX 7000S 192-Macro CPLD, 7.5ns, PQFP-160 | Altera
EPM7192SQC160-7N Obsolete
Specification Comparison
| Parameter | EPM7192SQC160-7N | EPM7192SQI160-10N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | MAX 7000S | MAX 7000 |
| Logic Family | CMOS | CMOS |
| Macro Cells | 192 | — |
| Usable Gates | 3,750 | 3.75K (typical) |
| User I/Os | 124 | 124 |
| Propagation Delay (tPD) | 7.5 ns | — |
| Internal Counter Frequency | 167 MHz | — |
| Pin Count | 160 | 160 |
| Package Type | PQFP (Plastic Quad Flat Pack) | — |
| Supply Voltage (VCCINT) | 5.0 V | 5.0 V |
| I/O Voltage (VCCIO) | 3.3 V / 5.0 V selectable | — |
| Programmability | EEPROM, In-System (JTAG ISP) | — |
| JTAG Support | IEEE 1149.1 Boundary Scan | — |
| Operating Temperature | 0 C to 70 C (Commercial) | 0C to +70C (industrial, 'N' suffix) |
| Mounting Type | Surface Mount | Surface Mount |
| Lead-Free (Pb-Free) | Yes (N suffix) | — |
| RoHS Status | Compliant (Pb-free terminal finish) | Compliant (per lead-free PQFP package marking) |
| Series | — | MAX 7000S |
| Architecture | — | Second-generation MAX (CMOS, EEPROM) |
| Logic Elements / Macrocells | — | 192 macrocells |
| Package | — | PQFP-160 (QFP-160, plastic) |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Internal Frequency | — | 167 MHz |
| Supply Voltage (VCCIO) | — | 5.0 V |
| In-System Programmability | — | Yes (5V ISP, JTAG) |
| Boundary-Scan Support | — | IEEE 1149.1 (JTAG) |
| Technology | — | 5V CMOS, EEPROM configuration memory |
| Propagation Delay | — | 7.5 ns to 10 ns (speed grade dependent) |