EPM7256AETC144-5N vs EPM7256AEQC208-5N Comparison
Detailed side-by-side comparison of EPM7256AETC144-5N by Altera and EPM7256AEQC208-5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7256AETC144-5N - 256-Macrocell MAX 7000A CPLD | Altera | TQFP-144
EPM7256AETC144-5N ✓ Active
Specification Comparison
| Parameter | EPM7256AETC144-5N | EPM7256AEQC208-5N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Family | MAX 7000A | MAX 7000A |
| Logic Family | CMOS | — |
| Usable Gates | 5,000 | 5,000 |
| Macro Cells | 256 | — |
| Logic Blocks | 16 | — |
| User I/Os (Mouser listing) | 36 | — |
| User I/Os (DigChip listing) | 84 | — |
| Pin-to-Pin Propagation Delay (tPD) | 4.5 ns | 5.5 ns |
| Maximum Internal Frequency | 227.3 MHz | 172.4 MHz |
| Counter Speed | 172.4 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| Program Memory Type | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG) | — |
| Package | TQFP-144 (Plastic Thin Quad Flat Pack) | 208-pin PQFP (Plastic Quad Flat Pack) |
| Operating Temperature | [DATA_NEEDED: operating temperature grade] | 0 C to +70 C (Commercial) |
| Lead-Free / RoHS | Yes (N suffix) | — |
| Speed Grade | -5 | -5 |
| Logic Family / Base Technology | — | CMOS, EEPROM-based |
| Macrocells | — | 256 |
| User I/Os | — | 164 |
| Dedicated Inputs | — | 16 |
| Number of Pins | — | 208 |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) / ISP |
| Mounting Type | — | Surface Mount |
| RoHS Status | — | unknown |
| MSL Level | — | [DATA_NEEDED: MSL Level] |