EPM7256SQC208-15N vs EPM7256SQI208-10 Comparison
Detailed side-by-side comparison of EPM7256SQC208-15N by Altera and EPM7256SQI208-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7256SQC208-15N | EPM7256SQI208-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Series | MAX 7000S | — |
| Macrocells | 256 | 256 |
| User I/O Pins | 164 | — |
| Pin-to-Pin Delay | 15 ns (speed grade -15) | — |
| Supply Voltage | 5 V | — |
| Package | 208-pin PQFP | 208-pin PQFP (QFP208) |
| Mounting Type | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) |
| JTAG Interface | IEEE 1149.1 boundary-scan | — |
| In-System Programmability | Yes (ISP) | — |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | — |
| RoHS Status | Lead free / RoHS Compliant | [DATA_NEEDED: RoHS status] |
| Logic Array Blocks | 16 macrocells per LAB | 16 |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Speed Grade | -15 | — |
| Product Category | CPLD - Complex Programmable Logic Devices | — |
| Manufacturer | Altera (Intel Programmable Solutions Group) | — |
| Device Family | — | MAX 7000 (EPM7256) |
| Usable Gates | — | 5000 |
| Maximum User I/O Pins | — | 164 |
| Propagation Delay (tPD) | — | 10 ns |
| Supply Voltage Range | — | 4.5 V to 5.5 V |
| Technology | — | CMOS EEPROM |
| In-System Programmable | — | Yes (IEEE 1149.1 JTAG) |
| Package Body Material | — | Plastic/Epoxy |
| Terminal Form | — | Gull Wing |
| Operating Temperature Range | — | -40 C to +85 C (Industrial) |
| JESD-30 Package Code | — | S-PQFP-G208 |
| JESD-609 Terminal Finish Code | — | E3 |