EPM7256SQC208-7 vs EPM7256SQC208-15N Comparison

Detailed side-by-side comparison of EPM7256SQC208-7 by Altera and EPM7256SQC208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM7256SQC208-7

EPM7256SQC208-7 - 256 Macrocell 5V CPLD | Altera | 208-PQFP

EPM7256SQC208-7 Nrnd
Altera
EPM7256SQC208-15N

EPM7256SQC208-15N - MAX 7000S CPLD 256 Macrocell | Altera

EPM7256SQC208-15N Obsolete

Specification Comparison

Parameter EPM7256SQC208-7 EPM7256SQC208-15N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $0.00
Device Family MAX 7000S (EPM7256S) β€”
Macrocells 256 256
Usable Gates 5,000 β€”
User I/O Pins 164 164
Propagation Delay (tPD) 7.5 ns β€”
Maximum Operating Frequency (fMAX) 128.2 MHz β€”
Supply Voltage (VCC) 5.0 V β€”
Configuration Technology EEPROM (non-volatile) β€”
In-System Programmability Yes (IEEE 1149.1 JTAG) Yes (ISP)
Package 208-pin PQFP (28 x 28 mm, 0.5 mm pitch) 208-pin PQFP
Mounting Type Surface Mount Surface Mount
Operating Temperature Range Commercial (0C to +70C) β€”
Minimum DC Input Voltage -0.5 V β€”
Input Undershoot Tolerance -2.0 V for <100 mA, <20 ns β€”
Speed Grade -7 (7.5 ns) -15
RoHS Status [DATA_NEEDED: RoHS status] Lead free / RoHS Compliant
MSL Level [DATA_NEEDED: MSL level] β€”
Logic Levels 5.0 V CMOS/TTL compatible β€”
Series β€” MAX 7000S
Pin-to-Pin Delay β€” 15 ns (speed grade -15)
Supply Voltage β€” 5 V
Configuration Memory β€” EEPROM (non-volatile)
JTAG Interface β€” IEEE 1149.1 boundary-scan
Operating Temperature β€” [DATA_NEEDED: operating temperature range]
Logic Array Blocks β€” 16 macrocells per LAB
Interconnect β€” Programmable Interconnect Array (PIA)
Product Category β€” CPLD - Complex Programmable Logic Devices
Manufacturer β€” Altera (Intel Programmable Solutions Group)

Datasheets & Resources

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