EPM7256SRC208-10 vs EPM7256SQC208-15 Comparison
Detailed side-by-side comparison of EPM7256SRC208-10 by Intel and EPM7256SQC208-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7256SRC208-10 | EPM7256SQC208-15 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Number of Macrocells | 256 | — |
| Number of Logic Array Blocks (LABs) | 16 | — |
| Number of Gates | 5000 | — |
| Number of User I/O Pins | 164 | — |
| Maximum Propagation Delay (tPD) | 10 ns | — |
| Maximum Operating Frequency | 100 MHz | — |
| Supply Voltage (Internal) | 4.75 V to 5.25 V | — |
| Programmable Type | In System Programmable (ISP, JTAG) | — |
| Configuration Technology | EEPROM | — |
| Package | 208-pin RQFP (BFQFP) exposed pad, 28x28 mm | 208-pin PQFP (28x28 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +70C (TA, commercial) | — |
| Terminal Form | Gull Wing | — |
| Package Shape | Square | — |
| Product Status | Obsolete | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | Contains lead / RoHS non-compliant (per third-party listing) |
| Series | — | EPM7256 |
| Macrocells | — | 256 |
| Logic Array Blocks (LABs) | — | 16 |
| Usable Gates | — | 5000 |
| User I/O Pins | — | 164 |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| Operating Temperature Range | — | 0 C to +70 C (Commercial) |
| Programmable Power Mode | — | Yes (per-macrocell turbo-bit) |
| JTAG (IEEE 1149.1) Boundary-Scan | — | Yes |
| In-System Programmability (ISP) | — | Yes |
| Configuration Memory | — | EEPROM (non-volatile) |
| Lead-Free Status | — | Contains lead |