EPM7256SRC208-7 vs EPM7256SRC208-15N Comparison
Detailed side-by-side comparison of EPM7256SRC208-7 by Altera and EPM7256SRC208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7256SRC208-7 | EPM7256SRC208-15N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | MAX 7000S | — |
| Device Type | EEPROM-based Complex Programmable Logic Device (CPLD) | — |
| Macrocells | 256 | 256 |
| Usable Gates | 5,000 | 5,000 |
| User I/O Pins | 164 | 164 |
| Pin-to-Pin Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency (fMAX) | 128.2 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 5 V | — |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) |
| Package | 208-pin RQFP (PowerQuad Flat Pack) | 208-pin RQFP (PowerQuad Flat Pack) |
| Package Code | FQFP | — |
| Terminal Form | Gull Wing | — |
| Number of Terminals | 208 | 208 |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature Grade | Commercial (0C to +70C) | — |
| Speed Grade | -7 (fastest standard grade) | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant (N suffix) |
| Packaging | Tray | — |
| Series | — | MAX 7000S |
| Logic Array Blocks (LABs) | — | 16 |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Maximum Counter Frequency | — | 76.9 MHz |
| Supply Voltage | — | 5 V |
| Operating Temperature | — | 0C to +70C (commercial) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| I/O Standard | — | 5 V TTL/CMOS compatible |
| Lead Free | — | Yes (N suffix) |
| MSL Level | — | [DATA_NEEDED: MSL level] |