EPM7256SRC208-7 vs EPM7256SRC208-15N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM7256SRC208-7 disebabkan oleh Altera dan EPM7256SRC208-15N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EPM7256SRC208-15N EPM7256SRC208-15N - MAX 7000S CPLD 256 Macro | Altera

EPM7256SRC208-15N - MAX 7000S CPLD 256 Macro | Altera

EPM7256SRC208-15N Obsolete

Pengandingan Spesifikasi

Parametr EPM7256SRC208-7 EPM7256SRC208-15N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Family MAX 7000S —
Device Type EEPROM-based Complex Programmable Logic Device (CPLD) —
Macrocells 256 256
Usable Gates 5,000 5,000
User I/O Pins 164 164
Pin-to-Pin Propagation Delay (tPD) 7.5 ns —
Maximum Internal Frequency (fMAX) 128.2 MHz —
Supply Voltage (VCCINT/VCCIO) 5 V —
Configuration Memory EEPROM (non-volatile) EEPROM (non-volatile)
Kemasan 208-pin RQFP (PowerQuad Flat Pack) 208-pin RQFP (PowerQuad Flat Pack)
Package Code FQFP —
Terminal Form Gull Wing —
Number of Terminals 208 208
Jenis Pemasangan Surface Mount Surface Mount
Operating Temperature Grade Commercial (0C to +70C) —
Speed Grade -7 (fastest standard grade) —
Status RoHS [DATA_NEEDED: RoHS status] Compliant (N suffix)
Packaging Tray —
Series — MAX 7000S
Logic Array Blocks (LABs) — 16
Pin-to-Pin Delay (tPD) — 15 ns
Maximum Counter Frequency — 76.9 MHz
Tegangan Pemberi Arus — 5 V
Suhu Operasi — 0C to +70C (commercial)
In-System Programmability — Yes (IEEE 1149.1 JTAG)
I/O Standard — 5 V TTL/CMOS compatible
Lead Free — Yes (N suffix)
Aras MSL — [DATA_NEEDED: MSL level]

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