EPM7256SRC208-7 vs EPM7256SRC208-15N 对比

详细并排对比 EPM7256SRC208-7 出自 Altera 和 EPM7256SRC208-15N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM7256SRC208-15N EPM7256SRC208-15N - MAX 7000S CPLD 256 Macro | Altera

EPM7256SRC208-15N - MAX 7000S CPLD 256 Macro | Altera

EPM7256SRC208-15N Obsolete

规格对比

参数 EPM7256SRC208-7 EPM7256SRC208-15N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $0.00 $27.20
Family MAX 7000S —
Device Type EEPROM-based Complex Programmable Logic Device (CPLD) —
Macrocells 256 256
Usable Gates 5,000 5,000
User I/O Pins 164 164
Pin-to-Pin Propagation Delay (tPD) 7.5 ns —
Maximum Internal Frequency (fMAX) 128.2 MHz —
Supply Voltage (VCCINT/VCCIO) 5 V —
Configuration Memory EEPROM (non-volatile) EEPROM (non-volatile)
封装 208-pin RQFP (PowerQuad Flat Pack) 208-pin RQFP (PowerQuad Flat Pack)
Package Code FQFP —
Terminal Form Gull Wing —
Number of Terminals 208 208
安装类型 Surface Mount Surface Mount
Operating Temperature Grade Commercial (0C to +70C) —
Speed Grade -7 (fastest standard grade) —
RoHS 状态 [DATA_NEEDED: RoHS status] Compliant (N suffix)
Packaging Tray —
Series — MAX 7000S
Logic Array Blocks (LABs) — 16
Pin-to-Pin Delay (tPD) — 15 ns
Maximum Counter Frequency — 76.9 MHz
电源电压 — 5 V
工作温度 — 0C to +70C (commercial)
In-System Programmability — Yes (IEEE 1149.1 JTAG)
I/O Standard — 5 V TTL/CMOS compatible
Lead Free — Yes (N suffix)
MSL 等级 — [DATA_NEEDED: MSL level]

数据手册与资源

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