EPM9320ALC84-20 vs EPM9320ALC84-15 Comparison
Detailed side-by-side comparison of EPM9320ALC84-20 by Altera and EPM9320ALC84-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320ALC84-20 | EPM9320ALC84-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.50 | $9.95 |
| Family | MAX 9000 | MAX 9000 CPLD |
| Device Type | EPLD (Erasable Programmable Logic Device) | β |
| Macrocells | 320 | 320 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/Os | 212 | β |
| Pin-to-Pin Delay (tPD) | 20 ns | β |
| Package | PLCC-84 | 84-pin PLCC (S-PQCC-J84, J-lead) |
| Process Technology | 0.5 Β΅m CMOS EEPROM | β |
| Supply Voltage | 5.0 V | β |
| Programmability | In-system via IEEE 1149.1 JTAG | β |
| Operating Temperature | [DATA_NEEDED: commercial or industrial grade] | -40C to +85C (industrial) |
| Mounting Type | Surface Mount (PLCC socket compatible) | Through-hole / socket |
| Configuration Memory | Non-volatile EEPROM | β |
| Boundary Scan | JTAG IEEE 1149.1 | β |
| Design Software | MAX+PLUS II / Quartus II (legacy) | β |
| RoHS Status | [DATA_NEEDED: per Altera datasheet] | [DATA_NEEDED: rohs status] |
| Usable Gates | β | 6000 |
| Propagation Delay (tPD) | β | 16 ns |
| Supply Voltage (VCC) | β | 4.75 V to 5.25 V (5 V nominal) |
| User I/O | β | 56 |
| Technology | β | CMOS, EEPROM-based configuration |
| Programming Interface | β | JTAG (IEEE 1149.1) / ISP |
| Moisture Sensitivity Level (MSL) | β | MSL-3 (168 hours per fpgalink.com) |
| Lead-Free / Halogen-Free | β | [DATA_NEEDED: lead free status] |
| RoHS3 Compliance | β | ROHS3 Compliant (per fpgalink.com listing) |