EPM9320ALI84-10 vs EPM9320ALC84-10 Comparison
Detailed side-by-side comparison of EPM9320ALI84-10 by Intel and EPM9320ALC84-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320ALI84-10 | EPM9320ALC84-10 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 6,000 to 12,000 | — |
| Macrocells | 320 | 320 |
| User I/O Pins | 84 | — |
| Package | 84-pin PLCC (Plastic Leaded Chip Carrier) | 84-pin PLCC (J-Lead) |
| Pin-to-Pin Delay (Tpd1) | 10 ns | — |
| Maximum Counter Frequency | 144 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| In-System Programmability | Yes, via IEEE 1149.1 JTAG | 5.0 V ISP via IEEE 1149.1 JTAG |
| Program Memory Technology | CMOS EEPROM | — |
| Process Technology | CMOS | — |
| Architecture | Multiple Array MatriX (MAX) | MAX (Multiple Array MatriX) with FastTrack Interconnect |
| Operating Temperature Range | -40C to +85C (Industrial) | — |
| Mounting Type | Surface Mount (PLCC socket compatible) | Surface Mount / Through-Hole (PLCC socket) |
| Device | — | EPM9320 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 52 |
| Dedicated Inputs | — | 16 |
| Speed Grade | — | -10 (10 ns pin-to-pin delay) |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Supply Voltage (VCCINT) | — | 5.0 V |
| Technology | — | CMOS EEPROM-based, third-generation MAX |
| PCI Compliance | — | PCI Local Bus Specification Rev. 2.2 (speed grade -10) |
| Operating Temperature | — | [DATA_NEEDED: commercial/industrial grade] |
| RoHS Status | — | [DATA_NEEDED] |
| Non-Volatile Configuration | — | Yes (EEPROM cell, powers up in known state) |