EPM9320ALI84-10 vs EPM9320ALI84-10N Comparison
Detailed side-by-side comparison of EPM9320ALI84-10 by Intel and EPM9320ALI84-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320ALI84-10 | EPM9320ALI84-10N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 6,000 to 12,000 | 6,000 to 12,000 |
| Macrocells | 320 | 320 |
| User I/O Pins | 84 | 56 |
| Package | 84-pin PLCC (Plastic Leaded Chip Carrier) | 84-pin PLCC (J-lead, 1.270 mm pitch) |
| Pin-to-Pin Delay (Tpd1) | 10 ns | — |
| Maximum Counter Frequency | 144 MHz | 144.9 MHz |
| Supply Voltage (VCC) | 5.0 V | — |
| In-System Programmability | Yes, via IEEE 1149.1 JTAG | Yes (IEEE Std. 1149.1 JTAG) |
| Program Memory Technology | CMOS EEPROM | — |
| Process Technology | CMOS | CMOS EEPROM |
| Architecture | Multiple Array MatriX (MAX) | MAX (Multiple Array MatriX), 3rd generation |
| Operating Temperature Range | -40C to +85C (Industrial) | — |
| Mounting Type | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket compatible) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 20 |
| Pin-to-Pin Delay | — | 10 ns |
| VCCINT (Core Supply) | — | 5.0 V |
| VCCIO (I/O Supply) | — | 3.3 V or 5.0 V |
| Input Logic Levels | — | TTL-compatible (at 5.0 V VCCINT) |
| Operating Temperature | — | -40C to +85C (industrial) |
| Configuration Memory | — | EEPROM, non-volatile |