EPM9320ARI208-10N vs EPM9320ARC208-10N Comparison
Detailed side-by-side comparison of EPM9320ARI208-10N by Altera and EPM9320ARC208-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9320ARI208-10N - MAX 9000 CPLD, 320 Macrocells, 208-RQFP | Altera
EPM9320ARI208-10N ObsoleteSpecification Comparison
| Parameter | EPM9320ARI208-10N | EPM9320ARC208-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.20 | $19.45 |
| Family | MAX 9000 | MAX 9000 |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Usable Gates | 6,000 | β |
| Macrocells | 320 | β |
| Logic Array Blocks (LABs) | 20 | 16 |
| Maximum Operating Frequency | 144.9 MHz | β |
| Propagation Delay (tPD) | 10 ns (speed grade -10) | 10 ns |
| Supply Voltage | 4.5 V to 5.5 V | β |
| Operating Temperature | -40 C to +85 C (industrial) | 0C to +70C (Commercial) |
| Package | 208-pin RQFP (S-PQFP-G208) | 208-pin RQFP (BFQFP with exposed pad) |
| Mounting Type | Surface Mount | Surface Mount |
| Process Technology | CMOS EEPROM | β |
| Programmability | In-system (ISP) via IEEE 1149.1 JTAG | β |
| Global Dedicated Inputs | 16 | β |
| Architecture | Multiple Array MatriX (MAX) third-generation | β |
| RoHS Status | unknown | Compliant (lead-free 'N' suffix) |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Macro Cells | β | 320 |
| Logic Gates | β | 6,000 gates |
| Maximum Frequency | β | 144.9 MHz |
| Supply Voltage (VCC) | β | 5 V |
| User I/O Pins | β | 168 |
| Dedicated Input Pins | β | 12 |
| Programming Interface | β | IEEE Std. 1149.1 JTAG |
| Configuration Memory | β | Non-volatile EEPROM |