EPM9320RC208-15N vs EPM9320RI208-20N Comparison

Detailed side-by-side comparison of EPM9320RC208-15N by Intel and EPM9320RI208-20N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9320RC208-15N EPM9320RI208-20N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $0.00
Family MAX 9000 β€”
Device Type CPLD (Complex Programmable Logic Device) β€”
Usable Gates 6,000 β€”
Macro Cells 320 β€”
Flip-Flops 484 484
Configurable I/O Lines 128 β€”
Propagation Delay (tPD) 15 ns 20 ns
Maximum Clock Frequency 117.6 MHz β€”
Supply Voltage 5.0 V β€”
I/O Voltage Compatibility 3.3 V or 5 V β€”
Configuration Technology CMOS EEPROM (non-volatile) β€”
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG Yes, 5.0 V ISP via JTAG
Package 208-pin RQFP (PowerQuad Flat Pack) 208-pin PQFP (Plastic Quad Flat Pack)
Terminal Pitch 0.5 mm β€”
Operating Temperature Range 0C to +70C (commercial) -40C to +85C (Industrial)
Mounting Type Surface Mount Surface Mount
Packaging Tray β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Device Family β€” MAX 9000 (EPM9320)
Logic Type β€” EEPROM-based Complex Programmable Logic Device (CPLD)
Macrocells β€” 320
Supply Voltage (VCC) β€” 5.0 V
I/O Voltage Tolerance β€” 3.3 V or 5 V configurable
Package Lead Pitch β€” 0.500 mm
Number of Terminals β€” 208
JTAG Interface β€” IEEE Std. 1149.1 compliant
Configuration Memory β€” EEPROM (non-volatile)
Dedicated Input Pins β€” 4 (low-skew global distribution)
Minimum DC Input on I/O Pins β€” -0.5 V
Minimum DC Input on Dedicated Inputs β€” -0.3 V
Input Undershoot/ Overshoot β€” -2.0 V / 7.0 V for <20 ns (no-load)

Datasheets & Resources

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