EPM9320RC208-20N vs EPM9320RI208-20 Comparison
Detailed side-by-side comparison of EPM9320RC208-20N by Altera and EPM9320RI208-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320RC208-20N | EPM9320RI208-20 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Family | MAX 9000 | — |
| Logic Type | Complex Programmable Logic Device (CPLD) | — |
| Usable Gates | 6,000 | 6,000 |
| Macro Cells | 320 | — |
| Logic Array Blocks | 20 | — |
| Maximum Pin-to-Pin Delay (tPD) | 20 ns | — |
| Maximum Operating Frequency | 100 MHz | 100 MHz |
| Supply Voltage | 5.0 V | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | Yes - IEEE 1149.1 JTAG, 5.0-V ISP |
| User I/O Pins | 168 | [DATA_NEEDED: I/O pin count for 208-pin RQFP] |
| Package | 208-pin RQFP (PowerQuad II) | 208-pin RQFP (Power Quad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| MSL Level | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Family | — | MAX 9000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 320 |
| Propagation Delay (tPD) | — | 20 ns |
| Supply Voltage (VCC) | — | 5.0 V |
| Logic Elements / LABs | — | 20 Logic Array Blocks (16 macro cells each) |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Dedicated Input Pins | — | 4 (low-skew global) |
| Operating Temperature Grade | — | Industrial |
| Technology | — | CMOS EEPROM |